Integre™ Technologies News
Integre Technologies Announces Low Cost, High Performance x1
HyperLink DSP Interface FPGA Core
Integretek core brings high performance interface to cost sensitive applications
Rochester, NY – February 12, 2015 – Integre Technologies, a leading provider of FPGA IP products and engineering services, today announced the release of the single lane IP-HyperLink high speed digital signal processor (DSP) interface core for both Altera and Xilinx device families.
The Integretek single lane HyperLink Core allows the creation of a user defined system which can communicate with TMS320C66x multicore DSPs from Texas Instruments Incorporated (TI) via a single lane high speed SERDES interface or to other FPGAs directly. The Integretek IP-HyperLink core leverages TI’s proven HyperLink technology to ensure compatibility with TI’s KeyStone™-based multicore processors. Developers supplementing TI’s KeyStone devices with proprietary FPGA implementations will benefit from KeyStone’s HyperLink, a dedicated chip- to- chip interface.
Features of the single lane IP-HyperLink FPGA core include:
- High Speed, Low-Latency, Point to Point Connection
- AXI or DMA FPGA Interface
- Up to 6.25 Gbps lane rate
- Simple packet-based transfer protocol for memory mapped access
- Self-Initializing Link
“The single lane HyperLink FPGA core provides the best cost to performance serial interface solution between an FPGA and TI DSP,” states James Mooney, Integre Director of Sales and Marketing. “Our royalty free license gives FPGA designers the ability to incorporate a single FPGA to DSP connection, or to instantiate multiple connections interfacing the FPGA to a number of DSP’s.”
“Integre’s background in FPGA design and experience with high speed I/O make them the logical choice to bring TI’s HyperLink technology to this market,” said Arnon Friedmann, marketing director, processors, TI. “The performance of the Integre’s IP-HyperLink core makes it an excellent solution for high speed communication with our KeyStone-based multicore DSPs.”
The IP-HyperLink core is currently available for customer design-in. For more information on the IPHyperLink core please contact email@example.com.
Integre Technologies is an engineering services and product company specializing in digital design and verification. Integre’s capabilities include: FPGA and ASIC design and verification including multi-million gate SOC’s, Mixed Signal ASIC Design and Circuit Board Design and Layout. Integre delivers solutions to both the commercial and mil/aero/secure communities engineering ground, air and space based products. Integre is headquartered in Rochester, New York. For more information on Integre please visit our web site at integretek.com.
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