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• Augmented client’s design and verification
team with multiple resources remotely on multi million gate SOC
ASIC design. Roles included chip and module level checkers, monitors,
extractors, test writing, regresses, formal verification and module
level rtl.
• Multi year engagement involving mixed signal cell phone ASIC.
Phase one entailed functional verification, scan insertion and vector
generation. Custom verification environment was developed using
PLI interface. Phase two consisted of the rtl design, synthesis,
functional and timing simulations, STA, scan insertion and test
generation of several sub modules. Phase three consists of taking
on the project management role including managing the entire ASIC
team along with interfacing with all third parties involved in the
design production.
• Project Consulting role on a secure project defining the
architecture for an RF transceiver design. Phase one consisted of
a design made from discrete parts with phase two is targeting a
Mixed signal ASIC.
• Augmented client’s verification team with multiple resources
performing module level functional verification for a PCI Express
core. Team was responsible for the entire verification environment
and test writing using Specman and Denali tools.
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• Project entailed replacing an obsolete 1.0 micron ASIC with
a pin for pin compatible 0.35 micron part. EDIF netlist and vectors
for original design were provided. Netlist conversion, vector simulation
and timing closer were performed on database. Resulting new part
successfully replaced obsolete part and allowed production to continue.
• Client was facing multiple board obsolescence issues with
product still in demand. Generic board with large FPGA and minimal
glue logic was developed to replace multiple boards. Complete rtl
redesign, functional simulation (board and fpga), synthesis and
gate simulations were performed for two boards. Additional BFM based
random simulations were also performed.
• Complete schematic design, PCB layout, and embedded software
development of a micro-controller based board that performed signal
processing between a remote control (RC) receiver and multiple electronic
speed controllers. Functionality included adjustable neutral position,
adjustable dead band, adjustable end points, failsafe control, relay
control with limit switches, flipping RC signal about neutral position
based on either sensor input or another RC channel, redundant RC
receiver inputs, tank style signal mixing, adjustable PWM frequency,
staggering of PWM output signals, rate control on PWM output signals
and serial communications to a PC.
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