ASIC DESIGN
- Which portions of my design should be incorporated into an
ASIC, which should not?
- How does the design change when an ASIC is developed?
- Does it make sense to include Analog components
on chip?
- What silicon geometry and library make sense
for my application?
- How do I reduce risk and keep to a schedule
without ruining up my budget?
- What are the real risks in my design?
- What tool flow(s) make sense for this design?
- What is a reasonable expectation for first order cost and schedule?
- Is my specification complete?
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FPGA DESIGN
- What development environment makes sense for this design?
- Device, size and feature recommendations
- If ultimately targeted for ASIC, what practices should be used for the FPGA?
SYSTEM / BOARDS LEVEL DESIGN
- Architecture Review
- Assembly considerations
- BOM review and Part Selection Analysis
- Schematic Review
- Layout review / potential issues
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