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Services
Integre Technologies can assist
you with your digital design, complete turnkey, front to back or
just a portion of the ASIC flow. Specifically:
Functional Verification
Timing Closure
ASIC/FPGA Re-Targeting
Reuse Methodologies
Modeling
Test and Code Coverage
Design for Test
Architecture and Specification
IC Foundry Selection
Design Flows
Test Plans
Production Test Vectors
Tools
Integre Technologies is an independent design services company
and therefore has the freedom to use the best tools for the job.
Verisity Specman, Synopsys Vera
VHDL, Verilog
C, C++, Assembly Languages
Perl, TCL/TK
Clearcase, CVS, RCS
Bugzilla
Synopsys Design Compiler, PrimeTime, Test Compiler
Formality, Chrysalis
Fastscan, Flextest
Cadence SOC designer
Cadence Verilog XL, VHDL/Verilog NC
Modelsim Mixed VHDL/Verilog PLI and FLI interface
Matlab/Simulink
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Experience
The staff of Integre Technologies has extensive knowledge and hands-on
experience in a wide range of problem spaces, foundry processes,
and tool flows with designs ranging from 5k to over 5 million gates.
Some of these are as follows:
cDSP with 6 C55x DSPs, XBAR, Shared Memory, Local DMAs,
Peripherals, 5 million gates
cDSP with 4 C54x DSPs Internal Memory, DMA,
Peripherals, 2 million gates cDSP with 2 C54x DSPs
Internal Memory, DMA,
Peripherals, 1 million gates
ARM9 / ARM7 embedded cores
Various Standards: PCI, serial communications, networking.
System on a chip design and verification experience
Image processing algorithms (Rendering, FIRs), Image
data path
DMA controllers
Compression / Decompression algorithms, FEC
Foundry experience: LSI, ATMEL, AMI, TI, Motorola,tsmc,
Maxim, Chip Express

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